Publications

(2022). DecGNN: a framework for mapping decoupled GNN models onto CPU-FPGA heterogeneous platform. ACM/FPGA (poster).

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(2021). Decoupoling the depth and scope of Graph Neural Networks. NeurIPS.

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(2021). Accelerating large scale real-time GNN inference using channel pruning. VLDB.

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(2021). Accurate, efficient and scalable training of Graph Neural Networks. JPDC.

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(2020). Hardware acceleration of large scale GCN inference. IEEE/ASAP.

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(2020). VTR 8: High-performance CAD and customizable FPGA architecture modelling. ACM/TRETS.

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(2020). Accelerating large scale GCN inference on FPGA. IEEE/FCCM (poster).

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(2020). GraphSAINT: Graph sampling based inductive learning method. ICLR.

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(2019). SPEC2: Spectral sparse CNN accelerator on FPGAs. IEEE/HiPC.

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(2019). A flexible design automation tool for accelerating quantized spectral CNNs. IEEE/FPL.

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(2019). Accurate, efficient and scalable graph embedding. IEEE/IPDPS.

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(2018). Throughput-optimized frequency domain CNN with fixed-point quantization on FPGA. IEEE/ReConFig.

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(2018). A fast and efficient parallel algorithm for pruned landmark labeling. IEEE/HPEC.

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(2018). An FPGA framework for edge-centric graph processing. ACM/CF.

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(2018). A framework for generating high throughput CNN implementations on FPGAs. ACM/FPGA.

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(2017). Fast generation of high throughput customized deep learning accelerators on FPGAs. IEEE/ReConFig.

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(2017). Quickly finding a truss in a haystack. IEEE/HPEC.

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(2017). Design and implementation of parallel PageRank on multicore platforms. IEEE/HPEC.

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